The invention relates to a broadband space-division switching network with linkage in a printed circuit board.
The wiring of a multi-stage space-division switching network is realized by utilizing canonical linkage. By canonical linkage is understood a special form of the simple and complete linkage in two-stage switching groups, in which the n.sup.th output of each switching matrix in the first switching stage is connected to the n.sup.th switching matrix of the second switching stage.
A wiring diagram of the switching matrices is shown in FIG. 1. The consecutive n outputs of the switching matrix M.sub.1 (I) of the first switching stage KS1 are respectively connected to the first inputs of consecutive switching matrices M.sub.1 (II) to M.sub.n (II) of the second switching stage KS2. The n outputs of the switching matrix M.sub.2 (I) of the first switching stage KS1 are likewise connected to the second inputs of the respective switching matrices M.sub.1 (II) to M.sub.n (II) of the second switching stage. This pattern is continued until, finally, the n outputs of the switching matrix M.sub.n (I) of the first switching stage KS1 are connected to the n.sup.th inputs of the switching matrices M.sub.1 (II) to M.sub.n (II) of the second switching stage KS2. In a multi-stage switching network the same wiring between the consecutive switching stages is implemented.
A switching network with 256 inputs and outputs, when utilizing switching matrices of 16 inputs and outputs and canonical linkage, requires 256 links between the individual switching stages. Signal transmission at high bit rates (for example 140 Mbits/s) necessitates the implementation of expensive coaxial cable. As a result of the bit accuracy aimed at for the different signal paths, the line lengths of the linkage have to have close tolerances. This conventional wiring by means of coaxial cable requires high manufacturing costs and much space for the switching matrix and the switching network.
Therefore, to reduce the required space, the wiring of the switching matrices of adjacent switching stages is increasingly realized by employing multi-layer platings. From NTZ Vol. 39 (1986) Book 5, pages 312 to 316, more specifically, page 315, a switching network module for 140 Mbit/s in CMOS technology is shown, on which the wiring of the switching matrices of adjacent switching stages having 64 in/outputs is effected by employing a six-layer printed circuit board.
Furthermore, in a paper for a lecture held at the NTG Professional Meeting from 25 to 27 Mar. 1985 ("Konzeption und Realisierung eines Breitband-Koppelnetzes fur 70 Mbit/s" by K. T. Langer et al, published in "Wege zum integrierten Kommunikationsnetz", lectures of the NTG Professional Meeting from 25 to 27 Mar. 1985 in Berlin, VDE-Verlag GmbH) a broadband switching network has been proposed, in which the wiring of the switching matrices of adjacent switching stages is realized by means of a 17-layer printed circuit board. The individual switching stages in the embodiment proposed therein, comprise on each printed circuit board 16 switching matrices having 16 inputs and outputs each, so that between the individual boards 256 links are required.
In view of obtaining a low power dissipation for the broadband switching network the shortest possible links are required, so that the printed circuit boards of the third stage of the five-stage switching network are turned through 90.degree. relative to the other stages. The decoupling of the links is effected by means of the multi-layer stripline wiring (a line between two earth on ground surfaces having a defined characteristic impedance). The switching matrices are housed in pairs onto the printed circuit boards, so that the number of strip-line arrangements is reduced to 8 and the number of layers to 17. As a result of the relatively high characteristic impedance chosen (the advantage of a lower average power dissipation and an adaptation which is poorer in reflection) the multi-layer printed circuit boards described above are 13 mm high, 15 mm wide and 400 mm long.
With an increasing number of links between the switching matrices of adjacent switching stages the manufacturing engineering problems associated with the manufacture of multi-layer printed circuit boards are increased. This is due to the fact that for the connection of the individual layers the multi-layer printed circuit boards have to be drilled with extreme accuracy and also because the additional deposition of conductor (for example copper) after the drilling of the holes entails further problems. The degree of integration of the switching matrices has been limited from a production engineering point of view due to the problem of connecting the links to the switching matrices.